A two-level inverter produces its output by switching between two voltages, so the waveform is a coarse approximation of a sine wave and the difference between them is harmonic distortion that has to be filtered out. A multilevel inverter builds the output from more voltage steps, so it approximates the sine more closely before any filtering at all. This project models two-level, three-level and five-level cascaded H-bridge inverters in Simulink under identical conditions, measures the total harmonic distortion of each, and quantifies the trade against switch count, control complexity and required filter size. It needs no hardware budget, which makes it a genuine option for a team without one.
Not just the parts. Teams budget from a component list, then run out in week six on wire, connectors and the driver board they destroyed. These are the lines that catch them.
| Line | Cost |
|---|---|
Components and materials From the bill of materials | Rs 0 |
Report, printing and binding Two or three bound copies, plots and the plagiarism check | Rs 400 to Rs 1,200 |
| Total | Rs 400 to Rs 1,200 |
| Each, split 3 ways | Rs 133 to Rs 400 |
Indicative bands last checked in August 2026 — a guide, not a quotation. Prices move and vary by seller, and anything you can borrow from the lab comes straight off the total. The 3 week figure assumes 7 person-weeks of work shared between 3; students past 4 add coordination rather than output, so the estimate stops improving there.
The same chain in words
All three topologies drive the same load at the same fundamental frequency and the same modulation index, so the only variable is the topology itself.
The two-level inverter switches each phase between the positive and negative rails. The line voltage therefore has three distinct levels and a large low-order harmonic content.
The cascaded H-bridge stacks the outputs of several full bridges in series per phase, each with its own isolated DC source. With two bridges per phase the phase voltage has five levels, and the steps between them are half the size.
Phase-shifted carrier modulation gives each bridge a carrier displaced in phase from the others, so the effective switching frequency seen by the load is multiplied by the number of bridges while each device still switches slowly.
The FFT block measures the harmonic spectrum of each output, and the results are compared on THD, on the frequency at which the dominant harmonics appear, and on the filter needed to meet a given limit.
This is the chapter that separates an engineering project from an assembly job. Every value below carries the formula that produced it and the assumptions it rests on — check them against your own ratings before you use them, because your motor is not this motor.
THD = sqrt(sum of squares of harmonic RMS values) / fundamental RMS
Quote whether it is voltage or current THD and up to which harmonic order the sum was taken, because both change the number substantially. A current THD figure into an inductive load always looks far better than the voltage THD, since the load itself filters.
levels = 2s + 1, where s is the number of isolated sources per phase
Each bridge contributes plus, zero or minus its own source voltage, and the series sum of two such bridges takes five distinct values.
switches = 4s per phase for a cascaded H-bridge
This is the cost side of the comparison and the report must state it plainly. Multilevel is not free — it buys waveform quality with device count, gate drivers, isolated supplies and control complexity.
f effective = number of carriers x carrier frequency
Phase-shifted carriers push the dominant harmonic cluster up to a multiple of the carrier frequency while each individual device still switches at the low rate, so switching losses stay low and the filter gets smaller at the same time.
fc set about a decade below the dominant harmonic cluster
This is where the multilevel advantage turns into money. Report the filter component values each topology needs to reach the same THD at the load, because that comparison is far more meaningful than the unfiltered THD numbers on their own.
| Item | Qty | Unit cost |
|---|---|---|
MATLAB with Simulink and Simscape Electrical College or student licence Use the institutional licence. If none is available, PSIM or the free PLECS viewer with an open model are alternatives worth naming in the report. | 1 | — |
Computer Any machine that runs the simulation in reasonable time Your own laptop or a lab machine — nothing to buy. | 1 | — |
Report production Printing, plots and binding Counted separately in the cost estimate below. | 1 | — |
Specifications are written as ratings rather than brands, so any equivalent part works. Where a line says to borrow from the lab, do — it is usually the largest number on the page, and the total drops to Rs 400 at the low end without them.
None of these blocks you — they are learnable inside a semester. Each one you do not have costs a couple of weeks, so count them into your plan.
Anything marked required is a blocker, not a difficulty. Arrange the access before you commit to the project, not after.
Use these when your guide says the scope is too small, or when you want something in the results chapter that nobody else in your batch will have.
The structure below is what a project report is marked against, with the mistake that costs marks in each chapter. There is no template to download and there will not be one: the writing is your work, and a site that did it for you would be helping you cheat rather than helping you pass.
A mini project report runs to about 40 to 50 pages, and the literature survey is usually brief. Guides expect one clear objective, met and measured. A final year report is normally 60 to 90 pages with a substantial literature survey, and many departments expect a paper submission alongside it.
The full report guide — front matter, conventions and page countsOne paragraph covering what the problem is, what you built, and what the result was. Written last, even though it appears first.
Loses marks: Describing the problem and the method but never stating a result. If there is no number in your abstract, it is not finished.
Why the problem matters, the context it sits in, and a clear statement of the objectives your project set out to meet.
Loses marks: Objectives written so vaguely that nobody can tell at the end whether they were met. Write objectives you can tick off in the conclusion.
What has already been done, what each approach achieved, and the specific gap your work addresses.
Loses marks: A list of paper summaries with no comparison and no gap. The survey exists to justify your design choice, so end it by saying what you chose and why.
The system as a whole: the block diagram, what each block does, and the signal or power path between them.
Loses marks: A block diagram copied from a datasheet or another report. Draw yours to match what you actually built, including the parts that are inconvenient.
Every component value and rating, with the formula, the assumptions and the arithmetic that produced it. This is the chapter that distinguishes an engineering project from an assembly job.
Loses marks: Component values with no justification. If a resistor is 10 kOhm, the report must say why it is not 1 kOhm.
The circuit as built, the PCB or wiring, the flowchart, and the parts of the code that carry the actual logic.
Loses marks: Twenty pages of pasted source listing. Include the flowchart and the few functions that matter, and put the full listing in an appendix.
What you measured, in tables and graphs, compared against what you predicted in the design chapter — including where they disagreed.
Loses marks: Photographs of the working model presented as results. A photograph is evidence that it exists, not evidence that it works. Results are measurements.
Whether each objective was met, what the measured performance was, and what the honest next step would be.
Loses marks: Future scope written as a wish list of unrelated features. It should follow from a limitation you actually hit.
Every source in a consistent style, plus datasheets, full code listings and the complete bill of materials.
Loses marks: Citing a blog or a video where a datasheet or a standard exists. Cite the primary source for anything you relied on.
The demonstration is half the assessment. These are the questions this project invites, and the answers are written the way you would give them out loud.
Because it approximates the sine wave with more, smaller steps. The harmonic content of a waveform is essentially the difference between it and a pure sine, so halving the size of each voltage step roughly halves the error at every instant. The distortion energy falls accordingly, and it also moves to higher frequencies where it is easier to filter.
Diode clamped, or neutral point clamped, uses clamping diodes to access intermediate levels from a split DC link, and it needs only one DC source but suffers from capacitor voltage balancing problems. Flying capacitor uses charged capacitors to create the levels and has redundant switching states that help balancing, but needs many capacitors. Cascaded H-bridge stacks independent full bridges in series and is the simplest to extend, but every bridge needs its own isolated DC source, which suits photovoltaic strings and battery packs naturally.
Each bridge is modulated against a carrier displaced in phase from the others. The switching harmonics of the individual bridges then partly cancel in the summed output, and the dominant remaining cluster appears at the number of bridges times the carrier frequency. So the load sees an effectively higher switching frequency, and needs a smaller filter, while each device still switches at the lower rate and keeps its switching losses down.
Cost and complexity. Every extra level adds switches, gate drivers and, in the cascaded topology, an isolated DC source with its own supply. The control has more states to manage, capacitor or source balancing becomes an active problem, and there are more components to fail. It is chosen when the waveform quality or the voltage rating genuinely requires it, not by default.
Because the load is inductive, and inductive reactance rises with frequency. The load itself therefore attenuates the high-frequency voltage harmonics, so far less harmonic current flows than the voltage spectrum alone would suggest. It is why a THD figure must always state whether it is voltage or current, and into what load.
Normally taken as a B.E. mini project (5th/6th sem) or B.E. final year project (7th/8th sem) project. If yours is a different course, the extensions above scope it up and the simpler half of the design scopes it down — the arithmetic does not change. Back to all projects.