FPGA / CPLD Dev Board

Module

A chip whose logic gates you wire up in code: describe hardware in Verilog/VHDL, synthesize, and the FPGA becomes that circuit — running everything in true parallel at nanosecond speed. The VLSI-lab board and the step beyond microcontrollers.

What it looks like

A typical module — exact shape, colour and markings vary between manufacturers.

Types & variants

CPLD (small, instant-on — glue logic)Entry FPGA boards (iCE40, Tang Nano, Cyclone IV EP4CE6)University boards (Basys 3 / DE10-Lite — switches & 7-segs onboard)SoC FPGA (Zynq — ARM cores + fabric)Legacy Spartan-3/6 kits (still in Indian labs everywhere)

Key specs

Logic elements (LEs/LUTs)

Capacity: 1–8k LEs handles counters, UARTs and CPU cores for coursework; video/DSP work wants 25k+.

Block RAM

kb / Mb

On-chip memory for FIFOs, buffers and small CPUs — often the real constraint before LUTs run out.

Clock speed / PLLs

MHz

Simple student designs close timing at 50–100 MHz; PLLs multiply the onboard crystal to what you need.

I/O pins & peripherals

—

University boards ship switches, LEDs, 7-segments, VGA and PMOD headers — exactly what lab experiments use.

Configuration

—

SRAM-based FPGAs forget on power-off and load from flash at boot; CPLDs/flash FPGAs (iCE40, MAX10) are instant-on.

Toolchain

—

Vivado (Xilinx/AMD), Quartus (Intel/Altera), Gowin IDE, or the open-source Yosys/nextpnr flow (iCE40/ECP5) — toolchain lock-in matters more than the silicon.

Markings

Board silk names the chip (e.g. XC7A35T, EP4CE6, GW1NR-9) — decode family and size from it. JTAG/USB programming port, config flash, and oscillator are the other landmarks.

Standard values

Indian lab classics: Spartan-3E/6 kits with Xilinx ISE. Current budget: Tang Nano 9K (~₹1500), EP4CE6 Cyclone IV boards, iCEBreaker/iCEStick for the open-source flow. Serious study: Basys 3 (Artix-7) / DE10-Lite (MAX10).

How to choose

1) Follow your course's toolchain — a Basys 3 is useless without Vivado experience being the goal. 2) Self-learners: Tang Nano or iCE40 boards + open tools = zero licence pain. 3) Want Linux + custom logic: Zynq boards. 4) Simple glue logic (address decode, level sequencing): a CPLD beats an FPGA on simplicity and instant-on. 5) Buy the board with the peripherals your projects need — adding VGA later is fiddlier than buying it onboard.

Pinout & package

Dev board: FPGA + config flash + oscillator + regulators + USB programmer + I/O headers (PMOD standard on many). Bare chips are QFP/BGA — hobby soldering ends at QFP; that's why boards exist.

Example circuits

The lab sequence: gates → adders → flip-flops → counters → FSM traffic light on 7-segments
VGA pattern generator — video timing from first principles
Soft CPU (PicoRV32/MicroBlaze) running C on hardware you synthesized
Logic analyzer / protocol sniffer clocked at 100 MHz — a thing MCUs can't be

Common failures

Killed I/O banks from 5 V signals on 3.3 V pins (level-shift!), corrupted config flash (board 'bricked' until JTAG reflash), broken micro-USB sockets, counterfeit chips on suspiciously cheap boards, and 'failures' that are really timing violations in the student's design.

How to test

Program the vendor's blink bitstream — configuration success proves the chain (tools → cable → flash → FPGA). Check rails (1.2/2.5/3.3 V typical). If synthesis passes but behaviour is flaky, read the timing report before blaming hardware.

Substitutes

For coursework, any board of the taught family substitutes (mind pin constraints files). MCUs substitute when parallelism/speed isn't the point; CPLDs for small glue; and simulation (ModelSim/Verilator/EDA Playground) substitutes for hardware entirely in early labs.

Where to buy

Robu Amazon DigiKey Mouser LCSC