Memory (EEPROM / Flash / RAM)

• Law of capacitance — capacitance formula Q = CVQ = C × V, i = C·dv/dt, E = ½CV²

  A DRAM cell is one capacitor holding Q = CV; leakage bleeds it away, which is why DRAM must be refreshed thousands of times a second.

• Ohm's lawV = I × R

  Serial EEPROMs sit on an I²C bus whose pull-up resistors set the rise time — too weak and the bus fails at speed.

Each law is stated in full — with its diagram, variables and worked meaning — on the electrical laws page.

Part number: 24LC256 = 256 kbit I2C EEPROM; W25Q64 = 64 Mbit SPI flash. A1/A0 pins set the I2C address.

24LC32–24LC512 EEPROMs; W25Q32/64/128 flash; 23LC1024 SRAM.

Settings and counters → EEPROM or FRAM (byte-writable). Firmware, logs, assets → SPI NOR flash. High-rate logging that must survive power loss → FRAM. Mind 3.3 V vs 5 V parts.

• 24LC256 storing calibration on an Arduino
• W25Q64 holding web assets for an ESP32
• FRAM ring-buffer data logger

Worn-out cells after exceeding write endurance (bytes stick or flip), corrupted writes from power loss mid-write, wrong I2C address strapping reading as 'chip dead'.

Write a pattern, power-cycle, read it back. I2C scanner confirms the address; check the WP pin isn't tied active when writes silently fail.

Within a family, bigger parts are usually pin-compatible drop-ins (24LC64 → 24LC256). FRAM substitutes EEPROM one-for-one on many footprints.